Library routine parameters can be constructed using either AND based mask or AND_OR based mask setting. For more information on these masks, see 16-bit Peripheral Libraries.

Examples of use for both the methods are below.

Example of Use ( AND mask )

#include<outcompare.h>

/* This is ISR corresponding to OC1 interrupt */

void __attribute__((__interrupt__)) _OC1Interrupt(void)

{

IFS0bits.OC1IF = 0;

}

int main(void)

{

/* Holds the value at which OCx Pin to be driven high */

unsigned int pulse_start ;

/* Holds the value at which OCx Pin to be driven low */

unsigned int pulse_stop;

/* Turn off OC1 module */

CloseOC1();

/* Configure output compare1 interrupt */

ConfigIntOC1(OC_INT_OFF & OC_INT_PRIOR_5);

/* Configure OC1 module for required pulse width */

pulse_start = 0x40;

pulse_stop = 0x60;

PR3 = 0x80 ;

PR1 = 0xffff;

TMR1 = 0x0000;

T3CON = 0x8000;

T1CON = 0X8000;

/* Configure Output Compare module to 'initialise OCx pin

low and generate continuous pulse'mode */

OpenOC1(OC_IDLE_CON & OC_TIMER3_SRC &

OC_CONTINUE_PULSE, pulse_stop, pulse_start);

/* Generate continuous pulse till TMR1 reaches 0xff00 */

while(TMR1<= 0xff00);

asm("nop");

CloseOC1();

return 0;

}

Example of Use ( AND_OR mask )

#define USE_AND_OR /* To enable AND_OR mask setting */

#include<outcompare.h>

/* This is ISR corresponding to OC1 interrupt */

void __attribute__((__interrupt__)) _OC1Interrupt(void)

{

IFS0bits.OC1IF = 0;

}

int main(void)

{

/* Holds the value at which OCx Pin to be driven high */

unsigned int pulse_start ;

/* Holds the value at which OCx Pin to be driven low */

unsigned int pulse_stop;

/* Turn off OC1 module */

CloseOC1();

/* Configure output compare1 interrupt */

ConfigIntOC1(OC_INT_OFF | OC_INT_PRIOR_5);

/* Configure OC1 module for required pulse width */

pulse_start = 0x40;

pulse_stop = 0x60;

PR3 = 0x80 ;

PR1 = 0xffff;

TMR1 = 0x0000;

T3CON = 0x8000;

T1CON = 0X8000;

/* Configure Output Compare module to 'initialise OCx pin

low and generate continuous pulse'mode */

OpenOC1(OC_IDLE_CON | OC_TIMER3_SRC |

OC_CONTINUE_PULSE, pulse_stop, pulse_start);

/* Generate continuous pulse till TMR1 reaches 0xff00 */

while(TMR1<= 0xff00);

asm("nop");

CloseOC1();

return 0;

}

3 Functions

3.1 CloseOCX (X = 1 … 5 )

Function Prototype	void CloseOC1(void); void CloseOC2(void); void CloseOC3(void); void CloseOC4(void); void CloseOC5(void);
Include	outcompare.h
Description	This function turns off the Output Compare module.
Arguments	None
Return Value	None
Remarks:	This function disables the Output Compare interrupt and then turns off the module. The Interrupt Flag bit is also cleared.

3.2 ConfigIntOCX (X = 1 … 5 )

Function Prototype	void ConfigIntOC1(unsigned int config); void ConfigIntOC2(unsigned int config); void ConfigIntOC3(unsigned int config); void ConfigIntOC4(unsigned int config); void ConfigIntOC5(unsigned int config);
Include	outcompare.h
Description	This function configures the Output Compare interrupt.
Arguments	config - Output Compare interrupt priority and enable/disable information as defined below: Interrupt enable/disable OC_INT_ON OC_INT_OFF Interrupt Priority OC_INT_PRIOR_0 OC_INT_PRIOR_1 OC_INT_PRIOR_2 OC_INT_PRIOR_3 OC_INT_PRIOR_4 OC_INT_PRIOR_5 OC_INT_PRIOR_6 OC_INT_PRIOR_7
Return Value	None
Remarks:	This function clears the Interrupt Flag bit and then sets the interrupt priority and enables/disables the interrupt.

3.3 OpenOCX (X = 1 … 5 )

Function Prototype	void OpenOC1(unsigned int config, unsigned int value1, unsigned int value2); void OpenOC2(unsigned int config, unsigned int value1, unsigned int value2); void OpenOC3(unsigned int config, unsigned int value1, unsigned int value2); void OpenOC4(unsigned int config, unsigned int value1, unsigned int value2); void OpenOC5(unsigned int config, unsigned int value1, unsigned int value2);
Include	outcompare.h
Description	This function configures the Output Compare module.
Arguments	config - This contains the parameters to be configured in the OCxCON register as defined below: Idle mode operation OC_IDLE_STOP OC_IDLE_CON Clock select OC_TIMER2_SRC OC_TIMER3_SRC Output Compare modes of operation OC_PWM_FAULT_PIN_ENABLE OC_PWM_FAULT_PIN_DISABLE OC_CONTINUE_PULSE OC_SINGLE_PULSE OC_TOGGLE_PULSE OC_HIGH_LOW OC_LOW_HIGH OC_OFF value1 - This contains the value to be stored into OCxRS Secondary register. value2 - This contains the value to be stored into OCxR Main register
Return Value	None
Remarks:	This function configures the Output Compare Module Control register (OCxCON)with the following parameters: Clock select, mode of operation, operation in Idle mode. It also configures the OCxRS and OCxR registers.

3.4 ReadDCOCXPWM (X = 1 … 5 )

Function Prototype	unsigned int ReadDCOC1PWM(void); unsigned int ReadDCOC2PWM(void); unsigned int ReadDCOC3PWM(void); unsigned int ReadDCOC4PWM(void); unsigned int ReadDCOC5PWM(void);
Include	outcompare.h
Description	This function reads the duty cycle from the Output Compare Secondary register.
Arguments	None
Return Value	This function returns the content of OCxRS register when Output Compare module is in PWM mode. Else ‘-1’ is returned
Remarks:	This function reads the duty cycle from the Output Compare Secondary register (OCxRS) when Output Compare module is in PWM mode.

3.5 ReadRegOCX(X = 1 … 5 )

Function Prototype	unsigned int ReadRegOC1(char reg); unsigned int ReadRegOC2(char reg); unsigned int ReadRegOC3(char reg); unsigned int ReadRegOC4(char reg); unsigned int ReadRegOC5(char reg);
Include	outcompare.h
Description	This function reads the duty cycle registers when Output Compare module is not in PWM mode.
Arguments	reg - This indicates if the read should happen from the main or secondary duty cycle registers of Output Compare module. If reg is ‘1’, then the contents of Main Duty Cycle register (OCxR) is read. If reg is ‘0’, then the contents of Secondary Duty Cycle register (OCxRS) is read.
Return Value	This function returns the content of OCxRS register when Output Compare module is in PWM mode. Else ‘-1’ is returned
Remarks:	The read of Duty Cycle register happens only when Output Compare module is not in PWM mode. Else, a value of ‘-1’ is returned.

3.6 SetDCOCXPWM(X = 1 … 5 )

Function Prototype	void SetDCOC1PWM(unsigned int dutycycle); void SetDCOC2PWM(unsigned int dutycycle); void SetDCOC3PWM(unsigned int dutycycle); void SetDCOC4PWM(unsigned int dutycycle); void SetDCOC5PWM(unsigned int dutycycle);
Include	outcompare.h
Description	This function configures the Output Compare Secondary Duty Cycle register (OCxRS) when the module is in PWM mode.
Arguments	dutycycle - This is the duty cycle value to be stored into Output Compare Secondary Duty Cycle register (OCxRS).
Return Value	None
Remarks:	The Output Compare Secondary Duty Cycle register (OCxRS) will be configured with new value only if the module is in PWM mode.
Source File:	SetDCOC1PWM.c SetDCOC2PWM.c SetDCOC3PWM.c SetDCOC4PWM.c SetDCOC5PWM.c

3.7 SetPulseOCX (X = 1 … 5 )

Function Prototype	void SetPulseOC1(unsigned int pulse_start, unsigned int pulse_stop); void SetPulseOC2(unsigned int pulse_start, unsigned int pulse_stop); void SetPulseOC3(unsigned int pulse_start, unsigned int pulse_stop); void SetPulseOC4(unsigned int pulse_start, unsigned int pulse_stop); void SetPulseOC5(unsigned int pulse_start, unsigned int pulse_stop);
Include	outcompare.h
Description	This function configures the Output Compare main and secondary registers (OCxR and OCxRS ) when the module is not in PWM mode.
Arguments	pulse_start - This is the value to be stored into Output Compare Main register (OCxR). pulse_stop - This is the value to be stored into Output Compare Secondary register (OCxRS).
Return Value	None
Remarks:	The Output Compare duty cycle registers (OCxR and OCxRS) will be configured with new values only if the module is not in PWM mode.
Source File:	SetPulseOC1.c SetPulseOC2.c SetPulseOC3.c SetPulseOC4.c SetPulseOC5.c

4 Macros

4.1 EnableIntOCX (X = 1 … 5 )

Macro	EnableIntOC1 EnableIntOC2 EnableIntOC3 EnableIntOC4 EnableIntOC5
Include	outcompare.h
Description	This macro enables the interrupt on output compare match.
Arguments	None
Remarks	This macro sets Output Compare (OC) Interrupt Enable bit of Interrupt Enable Control register.

4.2 DisableIntOCX (X = 1 … 5 )

Macro	DisableIntOC1 DisableIntOC2 DisableIntOC3 DisableIntOC4 DisableIntOC5
Include	outcompare.h
Description	This macro disables the interrupt on compare match.
Arguments	None
Remarks	This macro clears OC Interrupt Enable bit of Interrupt Enable Control register.

4.3 SetPriorityIntICX (X = 1 … 5 )

Macro	SetPriorityIntIC1 SetPriorityIntIC2 SetPriorityIntIC3 SetPriorityIntIC4 SetPriorityIntIC5
Include	outcompare.h
Description	This macro sets priority for output compare interrupt.
Arguments	None
Remarks	This macro sets OC Interrupt Priority bits of Interrupt Priority Control register.